PARELEC '98 Submission Deadline Extended

Peter Zinterhof Peter.Zinterhof@sbg.ac.at
Fri, 13 Feb 1998 10:01:43 +0100



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                    SECOND AND FINAL CALL FOR PAPERS

                               PARELEC'98

         Abstract submission and notification of participation 
               deadline extended to 15  M a r c h  1998

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              International Conference on Parallel Computing 
                       in Electrical Engineering

                               PARELEC '98


                           Bialystok, Poland
                         September 2 - 5, 1998

                           
                         Second Call for Papers


More info:      
                 http://falco.man.bialystok.pl/parelec98

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The conference organisation is supported by:

    Polish Section of the IEEE
    Technical University of Bialystok, Poland
    University of Quebec at Trois-Rivieres, Canada 
    Polish - Japanese Institute of Computer Techniques, Poland
    Polish State Committee for Scientific Research, Poland


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Scope of the Conference
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During the last decade, parallel systems have achieved increasing 
importance in many areas of applications. The PARELEC conference will
be an open forum where the progress connected with general aspects 
of parallel computing will be shown together with applications 
of parallel systems in the important areas of technology. 

The conference will consider two general aspects:
    * parallel computing environments and methods, 
    * applications of parallel computing in electrical 
      and electronic engineering. 

The presentation of the publications, held at one time and connected 
with the two suggested trends should, according to the organisers, 
stimulate further basic research and applications.


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Topics
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A list of relevant topics includes, but is not limited to, the following:

Parallel computing environments and methods

    * Parallel system architecture.
    * Parallel software environments.
    * Networks and heterogeneous computing.
    * Real time parallel computing.
    * Models of parallel computations.
    * Algorithms and automatic parallelization.
    * Numerical methods for parallel processing.
    * Neural networks and genetic algorithms.

Parallel computing in electrical engineering 

    * Electromagnetic field modelling.
    * Electrothermal management.
    * Power flow determination.
    * Load optimisation.
    * Transients parallel analysis (EMTP).
    * Parallel technology in VLSI chips.
    * Parallel systems in telecommunications.
    * Parallel simulation in power electronics.


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Information for the authors
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Please submit four copies of an extended summary (from 1 to 3 pages). 
The following information should be shown on the cover of the paper:
    * the subject of the paper, 
    * the author's name and place of employment,
    * mailing address, 
    * telephone number, fax number, e-mail address,
    * the title of the conference topic which would be the most 
      appropriate with the suggested paper. 

All papers accepted for the presentation will be published 
in the Conference Proceedings. The length of the full papers will be 
limited to 6 pages. Detailed information concerning the form of
preparing the paper will be sent together with the acceptance 
of the publication.


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Schedule 
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Notification of participation and 
sending the summarised paper-deadline.
                                                 15th March, 1998

Notification of Acceptance.                      1st May, 1998

Sending the full paper.                          10th July, 1998

Sending the final conference programme.          10th August, 1998



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Organising Committee
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Chair:	     Prof. Andrzej Jordan
             Technical University of Bialystok, Poland                 
             e-mail: jordana@cksr.ac.bialystok.pl

Co-Chair:    Prof. Marek Tudruj
             Polish-Japanese Institute of Computer Techniques, Poland
             e-mail: tudruj@ipipan.waw.pl

Secretary:   Boguslaw Butrylo, M.Sc.
             Technical University of Bialystok, Poland
             e-mail: bogb@cksr.ac.bialystok.pl

Treasury:    Dr Ing. Jaroslaw Makal
             Technical University of Bialystok, Poland
             e-mail: jaromaka@cksr.ac.bialystok.pl

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Programme Committee
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Dr Dereje Agonafer,          IBM, USA

Fiorenza C. Albert-Howard,   IEEE Computer Society

Prof. Mikolaj Buslowicz,     Technical University of Bialystok, Poland

Prof. Zbigniew Czech,        Silesia University of Technology, Poland

Dr Ivanoe de Falco,          Research Institute on Parallel Systems, 
                             CNR, Italy

Prof. Suresh V. Garimella,   Cray - Research Associate Professor, 
                             University of Winsconsin-Milwaukee, USA

Prof. Peter Kacsuk,          Hungarian Academy of Sciences, Hungary 

Prof. Henryk Krawczyk,       Technical University of Gdansk, Poland

Sophie Louage,               Fluent, Computational Fluid Dynamics 
                             Software and Consultancy Service, France

Prof. Daniel Massicotte,     University of Quebec at Trois-Rivieres, 
                             Canada

Prof. Ryszard Nawrowski,     Poznan University of Technology, Poland

Dr Laurent Nicolas,          Centre de Genie Electrique de Lyon, 
                             France

Prof. Patrice Quinton,       Institut de Recherche en Informatique
                             et Systemes Aleatoires, France

Prof. Muhammad H.Rashid,     University of Florida, USA

Dr Franciszek Seredynski,    Polish Academy of Sciences, Poland

Prof. Shizuo Shimada,        Polish-Japanese Institute of Computer 
                             Techniques, Japan, 
                             International Cooperation Agency, Poland

Prof. Adam Skorek,           University of Quebec at Trois-Rivieres, 
                             Canada

Prof. Andrzej Skowron,       Polish-Japanese Institute of Computer 
                             Techniques,
                             Warsaw University, Poland

Prof. Ryusuke Tsuji,         Ibaraki University, Japan

Prof. Lucjan Twardy,         Polish Power Grid Company, Poland

Prof. Marian Vajtersic,      University of Bratislava, Slovakia 

Prof. Stanislaw Wincenciak,  Warsaw University of Technology, Poland

Prof. Stephen C. Winter,     Centre for Parallel Computing, 
                             University of Westminster, England

Prof. Roman Wyrzykowski,     Technical University of Czestochowa, 
                             Poland 

Prof. Krzysztof Zielinski,   University of  Mining and Metallurgy,
                             Poland


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Conference Management
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The address of the conference office:

            PARELEC '98 - Secretariat
            Faculty of Electrotechnics
            Technical University of Bialystok
            45A Wiejska Str.
            15-351 Bialystok
            Poland

Phone:	    (+48) (+85) 421651 int. 123
Fax:	    (+48) (+85) 421657

WWW pages:  http://falco.man.bialystok.pl./parelec98

E-mail (electronic submission of papers):  
            parelec98sub@cksr.ac.bialystok.pl

E-mail (secretariat):         
            parelec98@cksr.ac.bialystok.pl


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Reply Card
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First Name:
Surname:
Title:
Affiliation:
Mailing Address:
   Zipcode:
   City:
   Country:
Telephone:
Fax:
E-mail:   


Yes, I intend to attend the PARELEC'98 conference:
  
        [ ]   Proposing a paper.
        [ ]   Proposing a panel discussion.
        [ ]   Without presenting a paper.


The provisional title of my paper / subject of panel discussion is: 
  



The contribution belongs to cathegory (please tick one):

    Parallel computing enviroments and methods    

        [ ]   Parallel system architecture.
        [ ]   Parallel software environments.
        [ ]   Networks and heterogeneous computing.
        [ ]   Real time parallel computing.
        [ ]   Models of parallel computations.
        [ ]   Algorithms and automatic parallelization.
        [ ]   Numerical methods for parallel processing.
        [ ]   Neural networks and genetic algorithms.

    Parallel computing in electrical engineering

        [ ]   Electromagnetic field modelling.
        [ ]   Electrothermal management.
        [ ]   Power flow determination.
        [ ]   Load optimisation.
        [ ]   Transients parallel analysis (EMTP).
        [ ]   Parallel technology in VLSI chips.
        [ ]   Parallel systems in telecomunications.
        [ ]   Parallel simulation in power electronics.

Please, send your application form not later than March 15, 1998.