Vortrag: Prof. William Jalby, 18.1.1999

[Maria Cherry]

                              UNIVERSITAET WIEN 
              INSTITUT FUER SOFTWARETECHNIK UND PARALLELE SYSTEME
                                gemeinsam mit 
                                   VCPC 
                EUROPEAN CENTRE FOR PARALLEL COMPUTING AT VIENNA 
                       

        EINLADUNG ZU EINEM VORTRAG IM RAHMEN DES INSTITUTS-KOLLOQUIUMS
                        
                
                A Perspective on Memory System Architecture 
                        and Its Impact on Compilers
  
 			   
                             Prof. William Jalby
                           University of Versailles

             
                 ZEIT: Montag, 18. 1. 1999, 17.00 Uhr c.t.
          ORT: Institut fuer Softwaretechnik und Parallele Systeme
                   1090 Wien, Liechtensteinstrasse 22, 
                          Seminarraum, Mezzanin



Abstract

Memory system performance is (and will still be for a long time!) the
key bottleneck in overall system performance (for uniprocessor as well
as for multiprocessors). As such, the problem of overall system architecture
is more and more dominated by memory issues.

We will briefly review the technology trends in memory components and
architecture. We then analyze the relation between applications, compiler and
memory systems, emphasizing in particular all of the potential that compiler
technology can provide to exploit efficiently complex memory systems.

We present in detail, the memory system organization of the AIDA architecture,
an ESPRIT project aiming at developing a cost effective memory organization, 
relying heavily on PC technology, to achieve aggressive cost performance 
ratios.

We will conclude this talk by some perspectives on future memory system
organizations.